리눅스 gcc(linux gcc) 2. Make

1. make basic

1-1 create make file

make -f makefile_name target.c

result: makefile_name making target.o created

1-2 make rule

target: dependency(prerequisite)
    command

• target: result generated by make

• dependency: input to create target(not necessary)

• command: action to create target
  must be tab-indented

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2 make variable(macro)

set variables(macros) for easy variable edit

2-1 user defined

• act like #define in C

• string without any ‘type’, case-sensitive

• read with { } or ( )

CC = gcc
CFLAGS = -Wall -std=c11

foo.o: foo.c foo.h
    $(CC) $(CFLAGS) -o foo.o -c foo.c

2-2 pattern symbols

symbols	example	description
$@: target	target: file1.c file2.c     gcc -o $@ -c file1.c file2.c	same command as gcc -o target -c file1.c file2.c
%: any string	%.o: %.c     gcc -c $< -o $@	compile *.c files and *.o respectively
$<: first dependency	target.o: file1.c file2.c     gcc -c $< -o target.o	same command as gcc -c file1.c -o target
$^: all dependencies	target: file1.c file2.c     gcc -c $^	same command as gcc -c file1.c file2.c
$?: newer than target	print:     echo "It is new: $?"	print with new filename like: It is new: new_filename

2-4 phony target

all: target

default(final) target for makefile

clean:
    command(usually rm)

delete unwanted temp files

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3. compile with make

3-1 run total makefile

single makefile,

make

or

make all_target

for phony target in all:

multiple makefile

make -f makefile_src

3-2 run specific target in makefile

make target_in_makefile